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Position
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Design
AutomationPrincipal Engineer/ Senior Engineer/ Engineer (Design Services) |
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**Location:Singapore
Responsibility:
- Create and qualify
DFM-based DRC, LVS and RCX technology files.
- Liaison with major
EDA and technology leading partners to develop advanced technology DFM IC
design methodology.
- Automate methodology
and technology files qualification.
- Develop IC reference
flows involving RTL to GDS implementations.
Requirements:
- Bachelor / Master
Degree in Electrical & Electronics Engineering majoring in IC design.
- Ph.D. with relevant
thesis work preferred.
- Able to lead project
team in business-driven development.
- Hands on experience
in CMOS IC design. Experience in memory or IO design is an advantage.
- Hands on experience
in modern EDA tools (Synopsys, Cadence, and/or Mentors), such as circuit
simulation, floorplaning, physical design, layout and verification.
- Hands on experience
in design kits and tech files creation.
- Hands on knowledge
of PERL programming and scripting.
- Familiar with wafer
fabrication process.
- Familiar with
Verilog and VHDL.
Please click this Link to
email your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 2: |
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Principal/
Senior Design Engineer (Analog/ Mixed Signal Backend) |
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**Location:Singapore
Responsibility:
This will centre around Gigabit
serial physical layer technology, including Band-gap reference, PLLs and CDRs
custom layout, but will also include other mixed signal custom layout, such as
Voltage Regulator, I/O PADs and Data converters. It will involve custom layout
for mixed signal IP, liaising with potential mixed signal IP suppliers.
Key features of the
Responsibility
To help lead the acquisition of mixed signal technology
Layout of gigabit serial CDRs and PLLs in 0.18 and 0.13 CMOS processes
Involved in custom layout craft, physical verification, parasitic extraction,
floor planning, and power trace arrangement.
Involved in defining layout requirements, planning, scheduling, monitoring
milestones and costs, and working with project peers.
Analyze 3rd party layout, optimizing, and process migration to improve the
performance, and reliability.
Conducts research into new layout tool, layout flow and verification flow to
improve the layout efficiency and quality.
Self motivated and independent Requirements:
Requirements:
- 5 - 10 years of direct
analog/mixed-signal custom layout experience.
- At least 2 years experience of high speed
custom layout in 0.18 and 0.13 CMOS.
- Responsible for custom layout craft and
physical verification.
- Device physics and model knowledge.
- Knowledge of basic analog circuitry.
- Hands on experience with relevant tools.
- Demonstrated history of on-time delivery
of highly valued products, which have been in. production with good
manufacturability and sales.
Please click this Link to
email your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 3: |
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Digital
IC Design, Staff/ Senior Engineers |
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**Location:Singapore
Responsibility:
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Perform all aspects of IC designing micro-architecture
development, RTL coding, constrain development, synthesis, test-bench
development and verification, DFT, timing analysis, formal verification, power
analysis, chip implementation for communications ICs.
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Support concept and system engineering, work with System/Chip
Architect to define the chip micro-architecture development for communications
ICs.
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Implementation of
wireless digital communication standards (ITU, IEEE and ETSI). Assist in
product and system definition
Requirements:
- Masters/Bachelor
Degree in Science/Electrical/Electronics Engineering
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More than 4 years relevant experience in VHDL/ Verilog coding
(RTL & behavioral), ASSP, ASIC development and verification, signal
processing, DSP and controller architecture.
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More than 6 years relevant experience, with experience in
technical team leadership, is required for Staff Engineer position.
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Working experience in wireless technology, communication
protocols, baseband architecture development is required.
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HW/SW co-simulation experience is an advantage; experience in
emulation; high complexity (>500k gates) designs for deep submicron technology
is desirable.
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Strong working technical knowledge in any of the following is
preferred:
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WLAN standard (802.11x
know-how), UWB, or any digital wireless communication protocol.
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Good understanding of
communication MAC layer, Analog, and/or RF processing is desired
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Team player with an open and co-operative personality.
Please click this Link to
email your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 4: |
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Design
Verification, Staff/ Senior Engineers |
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**Location:Singapore
Responsibility:
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Perform all aspects of Pre- and post-silicon verification,
including verification environment, verification requirement and plan from
product requirement to design specification for Wireless communication device
development.
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Work with System/Chip Architect, and IC designer to define
System-level, chip-level, and micro-architecture verification environment,
requirement & verification plan.
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Implementation of wireless digital communication standards (ITU,
IEEE and ETSI).
Requirements:
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PhD/Masters/Degree in Electrical/Electronics Engineering.
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More than 4 years relevant experience in pre-silicon
verification, VHDL/ Verilog coding (RTL & behavioral), ASSP, ASIC development
and verification, signal processing, DSP and/or micro-controller.
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More than 6 yr relevant experience, with experience in
technical team leadership, is required for Staff engineer position.
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Experience in emulation; high complexity (>1 million gates)
designs for deep sub-micron technology is required; HW/SW co-simulation (specman)
experience is an advantage. Assist definition for virtual prototyping.
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Experience in wireless technology, communication protocols,
baseband architecture development, with embedded DSP processor is preferred.
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Working technical knowledge in any of the following is
preferred:
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WLAN standard (802.11x
know-how), UWB, or any digital wireless communication protocol.
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Good understanding of
communication MAC layer, Analog, and/or RF processing is desired
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Team player with an open and co-operative personality
Please click this Link to
email your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 5: |
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Analog
Design Engineers/ Senior Engineers |
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**Location:Singapore
Responsibility:
- Design, simulate and characterize Fiber Optic Integrated Circuits.
Requirements:
- BS/ MS/Ph. D with major in Electrical/ Electronic Engineering or
equivalent.
- Min. 5 years working experience in designing Analog IC.
- A good understanding of CMOS and SiGe process technology are required.
- Good Knowledge of using Cadence Design Tools is a must.
- CAD knowledge & UNIX system administration would be a plus but not
necessary.
- Good understanding of high-speed amplifiers, switch-capacitor filters, etc.
Please click this Link to
email your resume for this position with full contact details
and telephone numbers. Please indicate your current Salary, Expected
Salary and Joining time required, if selected for the position
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Position 6: |
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Senior RF IC Design Engineers |
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**Location: Singapore
Responsibilities:
- Design of circuit building blocks for RFIC solutions;
- High performance circuit development for RF transceiver, frequency synthesizer
and VCO.
Requirements:
- 6 years of relevant working experience;
- B.Engg / Masters Degree / Ph.D with major in EE or Telecommunication
Engineering, particularly, in the related fields of Analog or RFIC designs;
- Experienced in designing a wide range of circuit functions for RFIC, such as
- RF circuits LNA, Mixer, Modulator, RF PGA, Power Amplifier, etc.
- Frequency synthesizer Integer-N or Fractional-N PLL, PFD/CP, VCO, Crystal
Oscillator, frequency/phase calibration algorithm, etc.
- Analog circuits VGA, Filter techniques, ADC/DAC, etc.
- Strong analytical skills in optimizing a particular Analog/RFIC circuit
topology to meet its block level specifications;
- A good understanding of CMOS and Bi-CMOS process technology;
- Solid foundation in RF theory and circuit analysis.
Please click this Link to
email your resume for this position with full contact details
and telephone numbers. Please indicate your current Salary, Expected
Salary and Joining time required, if selected for the position
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Position 7: |
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Senior Analog IC Design Engineers |
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**Location: Singapore
Responsibilities:
- Define IP block specifications based on system architecture and product
application requirements.
- Responsible for the circuit design simulation, prototype evaluation and
verification.
Requirements:
- B.Engg / Masters Degree / Ph.D with major in EE or Telecommunication
Engineering, particularly, in the related fields of Analog circuit designs.
- Experienced in designing circuit functions for mix-signal circuit design, such
as ADC / DAC / PGA / PLL / Filter / SERDES, etc.
- Strong analytical skills in optimizing a particular Analog circuit topology to
meet its block level specifications.
- A good understanding of CMOS process technology.
- Solid foundation in circuit analysis.
- Good skill in Cadence composer / Spectre and Spectre-RF / MATLAB
- Minimum 5 years of experience in mixed signal SOC design.
Please click this Link to
email
your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 8: |
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Senior System Design Engineer |
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**Location: Singapore
Responsibilities:
- RF IC architecture design
- RF IC noise, gain and linearity analysis
- RF IC frequency planning
- RF IC calibration and test algorithms
Requirements:
- MS/M.Engg, PhD in EE with emphasis on RF-related design fields
- 5 years of RF design experience
- Strong design background in RF circuits, especially in RF IC designs
- Design experience using advanced system level CAD tools (CADS/MATHLAB/MWO)
- A good understanding in wireless communications protocols (GSM/EDGE/WCDMA/WLAN/DTV/BLUETOOTH)
- Familiarity with CMOS and Bi-CMOS process technology is preferred
- Experience with type-approval testing
- Experience with wireless transceiver architectures design.
Please click this Link to
email
your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 9: |
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Senior Physical Design Engineers |
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**Location: Singapore
Job Responsibilities:
- In Charge of Digital Back-end Physical Design and automation;
- Main responsibilities include circuit synthesis, physical synthesis, static
timing analysis, chip floorplanning, auto place and route, capacitance and
resistance extraction, design rule checking and delay back-annotation;
- Responsible for clock tree synthesis, scan chain generation, critical path
timing analysis and power analysis.
Requirements:
- 5 years of relevant working experience.
- BS or above with major in EE or Computer Science related field;
- Familiar with floorplan, timing driven placement/routing, CTS, and LVS/DRC
design flow and be capable of running projects independently;
- Experience of tapeout with 018um and below process;
- Experience of hierarchy design flow preferred;
- Experience with DSM IC design or process, and familiar with device modeling,
crosstalk, IR drop analysis, preferred.
Please click this Link to
email
your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position
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Position 10: |
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Senior Physical Design Engineers |
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**Location: Singapore
Job Responsibilities:
- Active and passive device modeling for CMOS, BiCMOS and SiGe BiCMOS RFICs;
- On-wafer characterization of active and passive RFIC components including
parameter extraction, verification, characterization;
- Provide model and technology support to RFIC design teams;
- Test chip design and new test structure development for RF model parameter
extraction;
- Characterization of IC packages
Requirements:
- Master's or PhD in Electronic Engineering;
- 5 years experience in RF / microwave device modeling, and test/measurement.
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- Practical knowledge of the mathematics and semiconductor physics of high
performance transistor models;
- Proficient with network analyzer, spectrum analyzer, load pull and noise
parameter measurements;
- C++ programming, data manipulation, and general troubleshooting;
- Strong communication skills
Please click this Link to
email
your resume for this position with full contact details and
telephone numbers. Please indicate your current Salary, Expected Salary and
Joining time required, if selected for the position.
KBS
consultants
Flat H , Kulothungan Apartments
5, Dr Natesan Road,Ashoknagar
Chennai 600083,
India.
Ph: +91-44-24895341 / 24853296
+91-44-23719622 ( Global Placements Division)
Email : kbs@kbsconsultants.com
Web : http://www.kbsconsultants.com/
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